The present invention relates generally to improvements in digital data processors, and more particularly pertains to new and improved digital data processor systems wherein the data processor is a microprogrammed integrated circuit device.
In the field of digital data processing it is presently the practice to employ system architectures that evolved under the influence of high hardware cost. This constraint resulted in centralization of system control into devices referred to as the central processor and main memory units. Because of this massive and expensive centralized hardware which needed to be controlled, operating systems (master control programs) were evolved to generalize its utilization, by sharing it across a number of programs or tasks. The system architectures which resulted from these influences are highly generalized and as a result, are unnecessarily complex, ad hoc, and inefficient with respect to a large number of particular situations. This type of architecture is partitioned in an irregular manner and is implemented principally by hardwired sequential logic. Where micro-programming techniques are utilized, the basic system functional architecture is not changed in that the micro-coded processors still follow register oriented clocked sequential architectures.
The new integrated circuit technology, such as MSI and LSI which provide the essential elements of a data processor on a single chip can be utilized effectively only if a new set of design constraints is followed. LSI technology, for example, requires hardware regularity and non-dedication of specialized or complex algorithms to circuit chips. Additionally, since integrated circuit memories are interface compatible with integrated circuit logic, the register oriented processor architecture scheme may be eliminated by distributing the system circuit memory through the system. This, of course, eliminates the need of a centralized main memory subsystem. Now that it is feasible to distribute system memory throughout a system, it is desirable to eliminate the previously required central control operating systems.
To be able to utilize LSI technology effectively, a system architecture which results in a well-formed and regular partitionable system is required. Even though nearly all microprogramming techniques utilized in the past have this underlying objective, prior art programming techniques have failed to produce a system which is efficient to program and efficient in execution of its algorithms. In other words, these prior-art microprogrammed systems exhibit a total lack of continuity between what the machine language is and what the user programming needs and language demands are. This is true because the prior-art machine microcode languages are serial and binding in nature which is in direct opposition to the LSI technology demands for regularity, and nonbinding of complex functions.